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Urgent! ASIC Design Verification Engineer Job Opening In India, India – Now Hiring VeriFast Technologies

ASIC Design Verification Engineer



Job description

Job Title:

Design Verification Engineer
Location: Bangalore, Onsite only (JBR Tech Park, Whitefield Bangalore)
Employment Type:

Full-time Employment (contract considered)
15 Open Positions:
5 positions for 12+ years
5 positions for 8-12+ years
5 positions 5+ years

About VeriFast Technologies:
VeriFast Technologies, Inc.

is a global semiconductor company.

Headquartered in California, VeriFast operates worldwide with offices in the

USA, India, and Vietnam , and a growing team of

over 100 with sites on 500 soon.

We are working directly with leading semiconductor giants and technology startups.

We are a product and services company providing Design Services, Silicon IP, and End-to-End Silicon Development Platforms.

Job Summary:
We are seeking an experienced

Design Verification Engineer

to join our semiconductor design team.

The ideal candidate will have strong hands-on expertise in verifying complex SoC and IP-level designs using industry-standard verification methodologies.

Experience with

AMBA protocols (AXI/AHB/APB) ,

I²C , and

UART

is required, while exposure to

PCIe Gen4/Gen5/Gen6

and

CXL

is highly desirable.
Responsibilities:
Develop and execute detailed

verification plans ,

testbenches , and

coverage models

for IP and SoC designs.
Create and maintain

SystemVerilog/UVM-based environments

for functional verification.
Perform

constrained random testing ,

functional coverage analysis , and

debugging

of RTL and simulation issues.
Collaborate closely with RTL design, architecture, and validation teams to ensure design quality and completeness.
Participate in

regression runs , analyze failures, and drive root-cause resolution.
Contribute to verification methodology improvements, automation scripts, and reusable environments.
Required Skills & Experience:
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
5-15+ years of experience in

digital design verification

using

SystemVerilog and UVM .
Solid understanding of

AMBA protocols (AXI, AHB, APB) .
Hands-on experience verifying

I²C

and

UART

interfaces.
Proficient with industry tools such as

Synopsys VCS ,

Cadence Xcelium , or

Mentor Questa .
Strong debug skills using waveform viewers and simulation tools.
Desired Skills (Plus):
Experience verifying

PCIe Gen4/Gen5/Gen6

or

CXL

protocols.
Familiarity with

SoC integration ,

testbench automation , or

emulation platforms .
Exposure to

Python ,

Perl , or

TCL

scripting for automation.
Working knowledge of

functional coverage closure

and

assertion-based verification (SVA) .

Additional key words:
Verilog, VHDL, FPGA, Xilinx, Altera, Intel, AMD, Samsung, Qualcomm, Nvidea, GPU, AI, artificial intelligence, accelerator, machine language, large language models, LLM, Functional, Formal, Synopsys, Cadence, Mentor, Siemens.


Required Skill Profession

Engineers



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