Asic Rtl Design Engineer

Principal RTL Design Engineer & Architect Bangalore We are seeking a seasoned RTL Design Engineer with a strong background in microarchitecture and RTL coding.

The ideal candidate will play a key role in leading state of the RTL designs involving solutions for automotive camera and display systems.

Responsibilities - Design and develop microarchitectures for a set of chips involving MIPI CSI,DSI and SerDes protocols - Microarchitecture and RTL coding ensuring optimal performance, power, area - Collaborate with software teams to define configuration requirements, verification collaterals etc.
- Work with verification teams on assertions, test plans, debug, coverage etc.

Qualifications and Preferred Skills - BTech, MTech in ECE/EE - 10+ years hands-on experience in microarchitecture and RTL development - Proficiency in developing micro-architecture from the design requirements, defining the H/W- S/W interface - In-depth understanding of MIPI CSI and DSI protocols - Experience designing IP blocks for video and audio design Proficiency in Verilog, System Verilog - Familiarity with industry-standard EDA tools and methodologies - Experience with large high-speed, pipelined, and low power designs - Excellent problem-solving skills and attention to detail - Strong communication and collaboration skills - Experience with modern programming languages like Python is a plus