Design Verification Engineer - Embedded System

<p><p><b>Description : </b></p><br/><p>Job Title : Design Verification Engineer.<br/><br/>Location : Bangalore.<br/><br/>Experience : 6+ Years.</p><br/><p><b>Job Description : </b></p><br/><p>We are seeking experienced Design Verification Engineers with strong expertise in SystemVerilog-based testbench development using OVM/UVM methodology.</p><br/><p>The ideal candidate will have hands-on experience in verifying high-speed interfaces like USB 3.2 and DisplayPort v1.4, including writing test cases, developing UVCs, and handling error scenarios.</p><br/><p><b>Key Responsibilities : </b></p><br/><p>- Develop complex testbenches in SystemVerilog using OVM/UVM methodology.</p><br/><p>- Identify and implement features and functionalities for USB 3.2 and DisplayPort v1.4 protocols.</p><br/><p>- Develop USB 3.2 UVC with robust error handling mechanisms.</p><br/><p>- Update DisplayPort UVC with new features and enhancements.</p><br/><p>- Write and maintain test cases for USB 3.2, DisplayPort 1.4, and AUX channels.</p><br/><p>- Collaborate with design and verification teams to ensure thorough functional coverage.</p><br/><p>- Debug, simulate, and validate verification environments and test scenarios.</p><br/><p><b>Technical Skills Required : </b></p><br/><p>- Strong hands-on experience in SystemVerilog, OVM/UVM methodology.</p><br/><p>- Experience with USB 3.2 and DisplayPort 1.4 protocols.</p><br/><p>- Testbench development, UVC creation, and error handling in verification environments.</p><br/><p>- Writing functional test cases and performing coverage analysis.</p><br/><p>- Familiarity with simulation and verification tools used in high-speed interface verification.</p><br/><p><b>Soft Skills / Competencies : </b></p><br/><p>- Strong analytical and problem-solving skills.</p><br/><p>- Good communication and teamwork abilities.</p><br/><p>- Ability to work independently and manage multiple verification tasks.</p><br/><p>- Quick learner and adaptable to new protocols and methodologies.</p><br/></p> (ref:hirist.tech)