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Urgent! Design verification engineer Job Opening In India, India – Now Hiring Tessolve

Design verification engineer



Job description

Job Title: IP/So C Verification EngineerExperience Level: 5+ YearsLocation: Bengaluru, IndiaCompany: Tessolve SemiconductorDepartment: ASIC/So C Design & VerificationJob Type: Full-TimeAbout Tessolve:Tessolve is a leading provider of engineering solutions for silicon and system product realization, offering a unique combination of Pre-Silicon (Design, Verification) and Post-Silicon (Test, Validation, Characterization) capabilities.

With deep expertise in Semiconductor & Embedded Systems, Tessolve partners with global semiconductor leaders across various domains including automotive, consumer, industrial, and networking.Job Summary:We are seeking a skilled and driven IP/So C Verification Engineer to join our dynamic team in Bengaluru.

The ideal candidate will have 5+ years of hands-on experience in functional verification of complex IPs and So Cs, using System Verilog and UVM, and should be capable of independently driving verification tasks from planning to sign-off.Key Responsibilities:Develop constrained-random and directed testbenches using System Verilog/UVM.Verify complex IP blocks and So C-level integration, ensuring protocol and interface compliance.Define detailed verification plans, implement and execute test cases based on specifications.Perform functional coverage analysis, identify gaps, and close coverage.Debug simulation failures, triage issues, and work closely with RTL and architecture teams.Build and maintain regression automation and test infrastructure.Participate in So C-level integration testing, including inter-IP connectivity and system scenarios.Interface with physical design, DFT, and embedded software teams as required.Contribute to continuous improvement of verification methodology and reuse practices.Required Skills & Qualifications:B.

E/B.

Tech or M.

E/M.

Tech in Electronics, Electrical, or Computer Engineering.Minimum 5 years of experience in IP and/or So C functional verification.Expertise in System Verilog and UVM-based testbench development.Good understanding of digital design fundamentals and So C architecture.Experience in verifying standard protocols like AXI, AHB, SPI, I2 C, PCIe, or similar.Hands-on with industry-standard EDA tools: VCS, Questa Sim, Verdi, DVE, etc.Familiarity with Scripting languages: Python, Perl, Shell, or TCL for automation.Preferred Skills:Exposure to low-power (UPF) or power-aware verification.Knowledge of formal verification, DFT/DFD, and post-silicon debug.Experience in emulation platforms or FPGA-based prototyping.Familiarity with version control tools like Git or Perforce.Soft Skills:Excellent communication and teamwork abilities.Strong analytical and debugging skills.Self-motivated with a proactive attitude.Ability to mentor junior engineers or interns.What We Offer:Work on cutting-edge So C/IP designs for top-tier semiconductor clients.Competitive compensation and performance-based growth opportunities.Dynamic, collaborative work environment with global exposure.Access to Tessolve’s full-stack silicon design and post-silicon ecosystem.How to Apply:Interested candidates can send their resume to with the subject line:Application for IP/So C Verification Engineer – Bengaluru


Required Skill Profession

Architecture & Construction



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