FPGA - Post Silicon Validation Engineer

Exp: 3 to 15 Yrs Location: Hyderabad / Bangalore
The core skill set expected from the team is
:
Exceptional Digital fundamenta
lsHands on experience in System Design with FPGA devices with relevant FPGA EDA too
lsExperience in designing and implementing FPGA based solutions in Microchip or Xilinx or Altera FPG
AsWrite high quality code in Verilog/System Verilog, VHDL and C code for embedd
edprocessors.

Maintain existing cod
e.Developing testbenches using Verilog/System Verilog and verifying validation designs in simulation environment using BFM/V
IPExperience in using Synthesis, Placement constrain
tsSTA constraint definition and Timing closure for high speed desig
nsValidation of FPGA based implementation on HW boa
rdExperience in writing embedded FW programs in C/C
++Strong Lab debug experience and enthusiasm & patience to solve systems level hardware issues using Lab equipment, Embedded debuggers and RTL debugge
rsBe conversant with on-chip debug too
lsExperienced with scripting tcl/pe
rlExposure to Version management systems, GitHub, S
VNExcellent verbal and written communication skills in Engli
shStrong technical background in silicon validation, failure analysis and deb
ugUnderstand hardware architectures, use models and system level design implementations required to utilize the silicon feature
s.