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Urgent! Lead Sta & Synthesis Design Engineer Job Opening In Bengaluru – Now Hiring Cadence System Design and Analysis

Lead Sta & Synthesis Design Engineer



Job description

BE /Btech

EXp- 5- 12 Yrs


Work on challenging DDR PHY IP & Testchip Physical Design from Netlist-to-GDS in tech nodes below 7nm.


- Take ownership of one or more physical design blocks includes all of, floorplan, CTS, PNR, QRC, STA, PV & IR.


- Contribute to design methodology, flow automation.


- Innovate & implement Power, Performance and Area optimization techniques.


- Participate in IP release to customers and support team on standardize & document learnings.


Key Skills: Netlist-GDS physical design, 7nm+ Technology nodes, CTS and Custom Clocking, STA, PV, scripting tcl & python.


Minimum qualifications:


- Bachelor’s degree in Electronics or equivalent practical experience.


- 3+ years of experience and in depth knowledge on Netlist-GDS physical design.


- Experience on sub 7nm tech nodes.


- Good hands on experience on scripting tcl & python.


Preferred qualifications:


- Experience in hardening DDR PHY designs.


- Experience in physical synthesis and constraints design.


- Experience in Cadence tools Innovus, Genus, Tempus & Voltus.


- Experience in RDL routing, PERC ESD checks.


- Lower Tech node N3, Samsung N5,N4 knowledge is a plus.


Required Skill Profession

Engineers



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