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Urgent! Memory Compiler Physical Design Engineer Job Opening In Bengaluru – Now Hiring ACL Digital

Memory Compiler Physical Design Engineer



Job description

ACL Digital is looking for smart and enterprising Memory Layout Engineers to come join us and get an opportunity to do some cutting edge work and also work in a great environment where work is Always Fun and Exciting.


Experience: 4 to 5 Years


Skills :


  1. Having lower node Finfet experience.

    (10nm & less)
  2. Memory compiler layout, SRAM, Register File (RF)
  3. Available to join in 3-4 weeks .
  4. Location: Noida/ Hyderabad



For more details Contact: 6380023419

Email: krishnaprasath.s@acldigital.com


Required Skill Profession

Engineers



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