Urgent! ▷ Only 24h Left! VLSI - DFT Senior Engineer/Lead Engineer Job Opening In Rajkot – Now Hiring Eteros Technologies
Company: Eteros Technologies India Private Limited
Eteros Technologies, Inc.
is a Semiconductor Engineering services startup, head quartered in the heart of the Silicon Valley, San Jose, CA, USA.
Eteros Technologies India Pvt Ltd is a wholly owned subsidiary offices in Bangalore, Noida, Hyderabad and Ahmedabad
• Our world-wide customers are amongst The Who's who in the semiconductor industry.
Eteros works not only with some of the top 20 semiconductor startups in the world but boasts of customers who are among the most respected publicly traded semiconductor companies.
• Eteros engineers work on cutting edge technology nodes while working on the state-of-the art designs in the AI/ML, Datacenter, Automotive and 5G domains.
Eteros engineers work with some of the brightest, innovative and successful engineers and leaders around the world.
A one-of-a-kind opportunity where young Eteros engineers showcase their ability and experience world-wide from day 1 while learning from some of the world's most well-respected companies.
• We are not your traditional design services company offering staff augmentation.
Eteros engineers are treated as an integral part of the customer team and routinely are responsible for turnkey, end-to-end ownership and delivery, whether it is Implementation, Digital and Mixed Signal Verification, DFT or Analog Design and Layout.
Eteros and our engineers work closely with our customers to define and set methodologies and design flows.
• Eteros invests in our engineers.
Our engineers are continuously learning, on and off the job.
They are able to grow the breadth and depth of knowledge.
We believe in preparing our employees for the fast-track in career development as well as longevity
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Job Title/Role: DFT - Senior Engineer/Lead
Location: Bangalore/Hyderabad/Ahmedabad
Experience Level: 4+ Years
Industry: Semiconductors
Employment Type: Full-time
Job Functions: Engineering
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Summary
- Minimum 4 yrs+ experience in DFT implementation
- Must have worked on Scan Insertion, MBiST, ATPG, Simulations
- Must have experience with Synopsys DFT tools & Flows
- Experience in DFT timing closure preferred
- Experience in multi-die HBM/Memory testing with Synopsys tools preferred
- Work hands-on on critical tasks of DFT implementation
- Own the DFT implementation flows, methodologies and execution of SoCs Experience
- Experience in all phases of the DFT pre and post-Si for large SoCs
- Implement DFT of SoC/Full-chip-level and/or high-speed cores/blocks
- Experience in high-speed, low-power, mixed-signal SoC’s is a plus
- Preferably worked on 5nm/7nm/12nm/14nm/16nm nodes at the major foundries
- Experience in developing DFT architecture, Test-plan, implementation methodologies
- Experience in scan insertion, memory-BIST, JTAG/IJTAG, CTL, IEEE 1149.1/1500 wrappers, BSCAN, Compression, ATPG, Simulations, post-Si testing/debug
- Experience in manual test-point insertion, improve coverage targets, high-compression
- Experience in hierarchical ATPG, OCC/OPCG, power-aware scan/ATPG methodologies
- Experience in test-mode constraints generation and test-mode timing closure
- Experience in patter generation for foundry, post-Si support/debug
- Thorough understanding of digital design, timing analysis, and physical design process
- EDA Tools: Cadence (Encounter-Test, Modus-DFT, Tempus, Conformal), Mentor (Tessent tool suite), Synopsys (DFTC, Tetramax, TestMax-DFT, SMS, PTSI)
Requirements
• BTech/MTech/PhD with in Electrical or Computer engineering
• 4-8years of hands-on experience with DFT and test flow with commercial EDA tools for large and complex SOCs
• Strong fundamental knowledge of DFT techniques include JTAG, ATPG, yield learning, logic diagnosis, Scan compression, IEEE 1500 Std.
and MBIST
• Experience with Cadence & Synopsys DFT tools is required.
• Strong programming skills in Perl/TCL/C++ and shell scripting is required
• Must be able to solve complex problems and independently drive tasks to completion in a timely manner.
• Be able to work under limited supervision and take complete accountability.
• Excellent written and verbal communication skills
What's in it for you
• Work on leading edge technologies
• An opportunity for career development and growth
• Competitive compensation
• Medical Benefits and more
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Great news! Eteros Technologies is currently hiring and seeking a ▷ Only 24h Left! VLSI DFT Senior Engineer/Lead Engineer to join their team. Feel free to download the job details.
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