Principal Firmware Engineer

Job description

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission.

SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions.

Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission.

Are you passionate about working on cutting edge new technology in a team that embodies the growth mindset?

Are you hoping to join an organization which is built on a mission “To empower every person and organization on this planet to achieve more”?

We are working on the next generation Hardware/Firmware for server, silicon, and rack infrastructure of Cobalt and Maia systems with a focus on innovation in firmware technology to secure Azure infrastructure for Microsoft and their customers.



We are looking for a highly motivated **Principal** **Firmware** **Engineer** with experience in System on Chip Architecture (SoC), bring up of SoC, root causing issues, specify multidie/chiplet debug, author debug/trace bringup, drive selection/integration of decoders and host tooling and define trace collection/transport to onchip sinks at the intersection of multiple subsystems across firmware and hardware, manage debugging at scale for connected fleets.

**Responsibilities**

+ You will architect scalable debug solutions for pre-silicon, post-silicon, and production phases.

Develop and maintain SoC debug strategy and roadmap in collaboration with hardware and software teams.

+ You will implement high-performance debug infrastructure including trace, debug interfaces (e.g., JTAG, CoreSight), and system observability points ensuring coverage for functionality, performance, and power metrics.

+ You will be involved with all phases of product development including pre-silicon, post-silicon, and platform deployment in the datacenter.

+ You will perform data exploration and root cause analysis for SoC or platform-level issues.

+ You will use telemetry and logs for triage across multiple components and services.

+ You will collaborate with platform architects, firmware architects, program management and component dev teamsforunderstanding the technical depth of the features and defining SoC Debug Architecture, debug signals into Fleet systems and define Framework for SoC Debugging/Tools/methodology for End-to-end feature readiness

+ Stay ahead of industry trends and ensure debug capabilities align with future SoC architecture and security requirements

+ You will identify and address inefficiencies and gaps in architecture, testing, execution, etc.

+ You will mentor, guide, and help peers and other team members.

+ Ability to see system level “big picture” to validate that the integrated firmware/system software aligns to architectural goals of product.

+ Clear technical writing and crossorg influence; ownership of specs, reviews, and signoffs consistent with our Job Architecture expectation

**Qualifications**

**Required Qualifications**

+ Bachelor’s or higher in Computer Science, Computer Engineering, Electronics Engineering, or similar.
+ 15+ years of working experience in large scale system design & architecture, development, testing, and release and performance tuning.

+ Experience with Platform initialization, Board support package (UEFI/U-Boot), integration, low level drivers for peripherals such as PCIe, I2C, eMMC, SPI, USB, UARTs as well as Memory Management, Scheduling, Interrupts, and multi-threading.

+ Hands on experience in programming in C or C++ Strong problem solving, debugging, and troubleshooting skills.

+ Expertise in Design for Debug (DFD) techniques: observability points, trace buffers, error detection.

**Preferred Qualifications**

+ Familiarity with secure debug topics for ARM TrustZone and related security architectures

+ Ability to triage issues across hardware, firmware, and distributed systems.

+ Exposureto ARM-specific debug solutions: CoreSight, Debug Access Ports (DAPs), Embedded Trace Macrocells (ETMs), System Trace Macrocells (STMs).

+ Demonstrated experience of leading big initiatives spanning multiple teams and organizations and leveraging deep domain expertise to influence product roadmap.

+ Passionate about exploring and deploying noble methods to improve coverage, debugging, and efficiency of our FW releases.

Ability to meet Microsoft, customer and/or government security screening requirements are required for this role.

These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.

Microsoft is an equal opportunity employer.

Consistent with applicable law, all qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances.

If you need assistance and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations (https://careers.microsoft.com/v2/global/en/accessibility.html) .

Required Skill Profession

Other General