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Urgent! RTL Design Engineer - PCI-e Job Opening In Bengaluru – Now Hiring ARISE TECHGLOBAL PRIVATE LIMITED

RTL Design Engineer PCI e



Job description

<p><b>Job Description : </b><br/><br/>We are looking for a highly skilled RTL Design Engineer with strong expertise in RTL coding, micro-architecture design, CDC, and lint checks, and hands-on experience in PCIe Gen4/Gen5 (Root Complex / PCIe Controller) development.

The candidate will be responsible for end-to-end design implementation, ensuring high-quality, synthesizable RTL, and collaborating closely with verification and architecture teams.<br/><br/><b>Key Responsibilities : </b><br/><br/>- Design and develop RTL modules for PCIe Gen4/Gen5 Root Complex and Controller.<br/><br/>- Translate architecture specifications into micro-architecture and implement high-quality RTL.<br/><br/>- Perform Clock Domain Crossing (CDC) analysis and resolve issues.<br/><br/>- Conduct lint, synthesis checks, and timing closure support to ensure design robustness.<br/><br/>- Collaborate with verification teams to define verification strategies and resolve design bugs.<br/><br/>- Work on design integration at IP/Sub-system/SoC level.<br/><br/>- Support DFT/STA/physical design teams for successful chip implementation.<br/><br/>- Ensure compliance with PCIe protocol specifications and performance requirements.<br/><br/>- Document design, micro-architecture, and review specifications.<br/><br/>Required Skills & Experience : <br/><br/>- Strong expertise in RTL Design (SystemVerilog/Verilog).<br/><br/>- Hands-on experience in micro-architecture design and documentation.<br/><br/>- Deep understanding of Clock Domain Crossing (CDC) methodologies and tools.<br/><br/>- Experience with linting tools (Spyglass, Ascent Lint, etc.).<br/><br/>- Solid exposure to PCIe Gen4/Gen5 protocols - must have worked on Root Complex and/or Controller.<br/><br/>- Experience in synthesis, timing closure, and debug.<br/><br/>- Strong problem-solving, debug, and analytical skills.<br/><br/>- Good communication and ability to work with global teams.<br/><br/><b>Nice to Have :<br/></b><br/></p><p>- Exposure to other high-speed interfaces (CXL, Ethernet, DDR, USB).<br/><br/>- Familiarity with low-power design, power intent (UPF/CPF).<br/><br/>- Knowledge of Emulation/FPGA prototyping.<br/><br/>- Scripting knowledge (Python/Perl/Tcl) for automation.<br/><br/>- SoC-level integration and design experience.<br/><br/><b>Education :</b> Bachelor's / Master's degree in Electronics, Electrical, or Computer Engineering or equivalent.</p> (ref:hirist.tech)


Required Skill Profession

Engineers



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