<p><p><b>About the Role : </b><br/><br/></p><p>Univision Technology Pvt Ltd is seeking an experienced and highly skilled Senior Verification Engineer to join our dynamic team.
The ideal candidate will play a critical role in driving functional verification for Intellectual Properties (IPs) and System-on-Chip (SoC) designs.
This position requires deep technical expertise in verification methodologies, protocols, and automation scripting to ensure the highest quality of design validation.<br/><br/><b>Key Responsibilities : </b><br/><br/></p><p>- Lead and drive the functional verification process for complex IPs and SoCs, ensuring thorough validation against specifications.<br/><br/></p><p>- Develop, implement, and maintain testbenches using SystemVerilog and the Universal Verification Methodology (UVM).<br/><br/></p><p>- Create and execute verification plans, test cases, and coverage models to maximize design validation.<br/><br/></p><p>- Perform verification of various serial and parallel communication protocols including MIPI, SPI, I2C, MDIO, UART, and high-speed SERDES interfaces.<br/><br/></p><p>- Utilize advanced verification techniques such as formal verification, gate-level simulation (GLS), and Unified Power Format (UPF)-based power simulations.<br/><br/></p><p>- Automate verification processes and data analysis using scripting languages, primarily Python.<br/><br/></p><p>- Collaborate closely with design engineers, architects, and other cross-functional teams to identify issues early and improve design </p><p>robustness.<br/><br/></p><p>- Provide technical mentorship and guidance to junior engineers within the verification team.<br/><br/></p><p>- Participate in design reviews, provide feedback, and contribute to continuous process improvement initiatives.<br/><br/><b>Qualifications : </b><br/><br/></p><p>- Bachelors or Masters degree in Computer Science, Electrical Engineering, Electronics & Communication, or related fields.<br/><br/></p><p>- 6 to 10 years of professional experience in functional verification of IPs and SoCs.<br/><br/></p><p>- Strong hands-on experience with SystemVerilog and Universal Verification Methodology (UVM).<br/><br/></p><p>- Solid understanding of MIPI protocols and high-speed SERDES or parallel interfaces.<br/><br/></p><p>- Deep knowledge of verification techniques and methodologies including formal verification, GLS, and UPF-based power simulations.<br/><br/></p><p>- Familiarity with serial protocols such as SPI, I2C, MDIO, and UART.<br/><br/></p><p>- Proficiency in scripting languages, especially Python, for automation and data analysis.<br/><br/></p><p>- Strong analytical, problem-solving, and debugging skills.<br/><br/></p><p>- Excellent communication and teamwork abilities.<br/><br/><b>Preferred Skills :</b></p><p><p><br/></p>- Experience with industry-standard verification tools and environments.<br/><br/></p><p>- Exposure to power-aware verification flows.<br/><br/></p><p>- Familiarity with hardware description languages (HDL) like Verilog or VHDL.<br/><br/></p><p>- Prior experience in mentoring and leading verification teams.</p><br/></p> (ref:hirist.tech)