About Analog Devices
Analog Devices, Inc.
(NASDAQ: ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge.
ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world.
With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™.
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Senior Design Verification Engineer
The Engineering Enablement team is responsible for providing tools, methodologies, and support to engineering teams to accelerate product development across the company.
This position is for an opening in the “Systems Verification and Validation team” within the Engineering Enablement organization in the Vertical BU .This team works to define and promote the adoption of verification best practices, including Metric-driven verification, UVM, Formal, FUSA, Security, Emulation and FPGA Prototyping methodologies .
This role is more focused on driving Emulation and FPGA Prototyping solutions across ADI.
Job Responsibilities:
Lead, Develop and deploy best-in-class Emulation/FPGA prototyping tools and methodologies across ADI Product Lines as part of Verification Excellence Program (VXP)Develop and deploy Accelerated Verification IPs, Synthesizable BFMs and help in integration of memory models of various interfacesEngaging with EDA vendors to influence their development roadmaps to meet ADI’s requirements into the futureSupport the product lines in bring-up of new designs, debug issues and explore new methodologies that improve the overall verification flowTraining, deployment, and support of verification methodologies within ADI Position Requirements:
Bachelors/master’s degree in electrical/Electronics/VLSI with 4-7 years of experienceExposure to emulation platforms like Palladium/Zebu/Veloce and prototyping platforms like Protium/HAPS is highly preferred.Exposure to JTAG, UART and SpeedBridges (Ethernet/USB) validation is highly preferredExpertised in one or more of scripting languages(shell,python,perl) is highly preferredProficient in SV, UVM, integration of third party VIPS, Accelerated VIPS is requiredExperience with Vplan/Testplan development and development of verification environment from ground up is goodExperience in common communication protocols such as AMBA,I2C, SPI,UART and Ethernet is an added advantageShould be able to communicate technical details very effectively with both customers (product line teams) and peersGood debugging and analytical skillsJob Req Type: ExperiencedRequired Travel: Yes, 10% of the timeShift Type: 1st Shift/Days