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Urgent! Sram memory compiler development project lead Job Opening In Kurnool – Now Hiring UST Malaysia

Sram memory compiler development project lead



Job description

UST is looking for an experienced and hands-on Project Lead to drive Memory Compiler Development.

The ideal candidate will have 8+ years of expertise in full custom memory design, including architecture, layout, characterization, and verification at the compiler level.

This leadership role requires strong technical depth and the ability to manage cross-functional teams, project plans, risk mitigation, and quality assurance in a fast-paced environment.Work location: Remote/onsite from Vietnam/Singapore/MalaysiaKey Responsibilities:Lead end-to-end SRAM memory compiler development, including:Full custom memory architecture designLayout design, netlisting, and characterizationCompiler-level (not just instance-level) verification of both design and layoutDefine, maintain, and track:Execution Plans and project schedulesDesign Quality Plans (DQP)Design Failure Mode and Effects Analysis (DFMEA)Risk identification, tracking, and mitigation strategiesProject health reports for stakeholdersCollaborate with design, layout, verification, and test teams across multiple geographiesDrive technical reviews, sign-offs, and ensure high-quality deliverablesMentor junior team members and foster a high-performance cultureRequired Qualifications:8+ years of hands-on experience in:Full custom memory design and compiler architectureSRAM design at compiler levelLayout development and custom netlistersMemory characterization tools and flowsComprehensive design and layout verificationDeep understanding of EDA tools for layout, simulation, and verification (Cadence, Synopsys, etc.)Strong understanding of design quality methodologies, DFMEA, and ISO/IEC standardsProven ability to lead multi-disciplinary teams and complex projectsExcellent communication, documentation, and reporting skillsPreferred Qualifications:Experience in low-power memory designs and advanced process nodes (7nm, 5nm, etc.)Familiarity with silicon validation and test strategiesExposure to compiler automation and flow optimizationHow to Apply:If you're ready to take the lead in cutting-edge memory compiler development, connect with us today!????

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