VotaryTech - Senior Design Verification Engineer - UVM/System Verilog

<p><p><b>About the Role :</b><br/><br/>We are seeking a highly skilled Senior Design Verification Engineer with strong expertise in IP/block-level verification to join our hardware engineering team.

The ideal candidate will be responsible for architecting, developing, and executing verification strategies for complex SoC/IP designs, ensuring high-quality deliverables and first-time-right silicon.

This role requires hands-on experience with UVM-based verification environments, low power verification (UPF), and advanced debugging skills.<br/><br/><b>Key Responsibilities :</b><br/><br/>- End-to-End Verification Ownership : Lead verification of complex IP blocks from test plan creation through execution, coverage closure, and sign-off.<br/><br/>- Testbench Development : Architect and implement reusable UVM-based testbenches, including drivers, monitors, scoreboards, assertions, and checkers.<br/><br/>- Low Power Verification : Drive UPF-based verification flows, validate power intent, and ensure functional correctness in low-power modes.<br/><br/>- Simulation & Regression : Execute large-scale simulations, manage regressions, triage/debug failures, and provide timely fixes or workarounds.<br/><br/>- Protocol Verification : Validate high-speed protocols (PCIe/USB/CXL), ensuring compliance and robustness of the design.<br/><br/>- Coverage & Quality : Develop and track functional and code coverage metrics, driving closure against project goals.<br/><br/>- Collaboration : Work closely with design, architecture, and validation teams to ensure seamless integration and early bug detection.<br/><br/>- Process & Best Practices : Contribute to methodology improvements, automation, and scalable verification frameworks.<br/><br/><b>Requirements :</b><br/><br/><b>Education :</b> B.E/B.Tech or M.E/M.Tech in Computer Engineering.<br/><br/><b>Experience :</b> 5- 10 years of experience in ASIC/SoC design verification with proven end-to-end ownership of IP/block verification.<br/><br/><b>Technical Skills :</b><br/><br/>- Strong expertise in SystemVerilog, UVM methodology, assertions, and checkers.<br/><br/>- Hands-on with low power verification flows (UPF/CPF).<br/><br/>- Deep understanding of clocking, reset, and boot flows.<br/><br/>- Strong debugging skills across simulation and emulation environments.<br/><br/>- Familiarity with PCIe, USB, or CXL protocols (preferred).<br/><br/><b>Soft Skills :</b> Strong analytical thinking, problem-solving ability, communication skills, and ability to work in cross-functional teams.</p><br/></p> (ref:hirist.tech)